Which register stores the address of the next instruction to be executed?

Which register stores the address of the next instruction to be executed?

• A. Extended Base Pointer (EBP)
• B. Extended Source Index (ESI)
• C. Extended Instruction Pointer (EIP)
• D. Extended Stack Pointer (ESP)

Answer: (C)

The instruction pointer is the register that holds the address of the next instruction to fetch. In 32-bit x86, that is the EIP. It advances automatically as each instruction is retrieved, by the instruction’s length, so execution proceeds sequentially. If a control transfer occurs, such as a call, jump, or return, EIP is updated to the target address to redirect execution. The other registers have different roles: ESP points to the top of the stack, EBP serves as a stack frame base, and ESI is used as a source index for memory operations. They do not indicate the next instruction address, so they aren’t the correct choice.

The instruction pointer is the register that holds the address of the next instruction to fetch. In 32-bit x86, that is the EIP. It advances automatically as each instruction is retrieved, by the instruction’s length, so execution proceeds sequentially. If a control transfer occurs, such as a call, jump, or return, EIP is updated to the target address to redirect execution. The other registers have different roles: ESP points to the top of the stack, EBP serves as a stack frame base, and ESI is used as a source index for memory operations. They do not indicate the next instruction address, so they aren’t the correct choice.