Which term stores the address of the next instruction to be executed?

Which term stores the address of the next instruction to be executed?

• A. Extended Instruction Pointer (EIP)
• B. Extended Base Pointer (EBP)
• C. Extended Stack Pointer (ESP)
• D. Extended Source Index (ESI)

Answer: (A)

The address of the next instruction to be executed is held by the instruction pointer. In x86 CPUs, this is called EIP in 32-bit mode (and RIP in 64-bit mode). The processor uses this register to fetch the next instruction from memory. After each fetch, the pointer advances by the length of the current instruction, so execution continues sequentially. If a jump, call, or return occurs, the processor loads a new address into the instruction pointer to redirect the flow of execution. The other registers mentioned serve different roles: the base pointer marks the start of a stack frame, the stack pointer points to the top of the stack, and the source index is used for certain memory addressing tasks.

The address of the next instruction to be executed is held by the instruction pointer. In x86 CPUs, this is called EIP in 32-bit mode (and RIP in 64-bit mode). The processor uses this register to fetch the next instruction from memory. After each fetch, the pointer advances by the length of the current instruction, so execution continues sequentially. If a jump, call, or return occurs, the processor loads a new address into the instruction pointer to redirect the flow of execution. The other registers mentioned serve different roles: the base pointer marks the start of a stack frame, the stack pointer points to the top of the stack, and the source index is used for certain memory addressing tasks.